Analog / Mixed-Signal Design Engineer(Junior) ——PH
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10K-20K 上海 1-3年 本科及以上 全职
职位□□: Competitive salary with generous stock options，Commensurate with experience/skill
Job Description:
- You will perform analog and mixed signal design, characterization and evaluation of analog circuits such as:
high-speed amplifiers, wireline transmitters, PLL, or other baseband circuits like LDO, temp sensor, ADC, Filters, etc.
- You will optimize the design of high-frequency (multi-gigahertz) and high-precision analog circuits.
- Use EDA tools (Cadence, Mentor) to run simulation and function verification.
- Guide layout engineer to optimize layout.
- Chip debug and testing individually.
- Design and optimize chip layout.
Qualifications:
- MSEE in analog IC design with 2 years experience.
- Experience in Cadence EDA tools.
- Team player with good communication skills.
- Experience with SERDES transmitter/receiver, TIA, CDR, LNA etc. is highly preferred.
- Desired: Knowledge of advanced circuits such as PLLs, ADCs, DACs, LNAs, drivers, NF, S-parameters, BW extension.
- Desired: Experience in RF circuit design, testing, and post-silicon bring-up and evaluation.
公司介绍
We are a Shanghai/SiliconValley based stealth-mode semiconductor startup, and backed by the world’s leading venture capital firm for hardware. Our returnee founders are successful entrepreneurs with backgrounds from Stanford, Fudan, Intel, LSI, and nVidia. They have been collectively involved in six successful startups, with their last IC startup in Shanghai previously acquired for 200+ mil-RMB.
Our company culture is like a Silicon-Valley style startup, with a unique USA/ Chinese-blend of lifestyle and innovation. Our vision is to learn, challenge, and grow together, creating exponential value for our customers, ourselves, and our company.
详细请扫描下方二维码：
职位□□: Competitive salary with generous stock options，Commensurate with experience/skill
Job Description:
- You will perform analog and mixed signal design, characterization and evaluation of analog circuits such as:
high-speed amplifiers, wireline transmitters, PLL, or other baseband circuits like LDO, temp sensor, ADC, Filters, etc.
- You will optimize the design of high-frequency (multi-gigahertz) and high-precision analog circuits.
- Use EDA tools (Cadence, Mentor) to run simulation and function verification.
- Guide layout engineer to optimize layout.
- Chip debug and testing individually.
- Design and optimize chip layout.
Qualifications:
- MSEE in analog IC design with 2 years experience.
- Experience in Cadence EDA tools.
- Team player with good communication skills.
- Experience with SERDES transmitter/receiver, TIA, CDR, LNA etc. is highly preferred.
- Desired: Knowledge of advanced circuits such as PLLs, ADCs, DACs, LNAs, drivers, NF, S-parameters, BW extension.
- Desired: Experience in RF circuit design, testing, and post-silicon bring-up and evaluation.
公司介绍
We are a Shanghai/SiliconValley based stealth-mode semiconductor startup, and backed by the world’s leading venture capital firm for hardware. Our returnee founders are successful entrepreneurs with backgrounds from Stanford, Fudan, Intel, LSI, and nVidia. They have been collectively involved in six successful startups, with their last IC startup in Shanghai previously acquired for 200+ mil-RMB.
Our company culture is like a Silicon-Valley style startup, with a unique USA/ Chinese-blend of lifestyle and innovation. Our vision is to learn, challenge, and grow together, creating exponential value for our customers, ourselves, and our company.
详细请扫描下方二维码：
2016/1/6 13:47:04